In a transceiver circuit, a phase locked loop (PLL) may generate one or more clock signals, for distribution across the transceiver circuit. For example, a clock distribution circuit may distribute the clock signal with multiple quadrature clock phases. Distributing these multiple quadrature clock phase signals across a circuit can consume a significant amount of power.
To avoid the power consumption of such clock distribution circuits an injection locked oscillator (ILO) may be used to generate the quadrature signals more locally.